1. Technical Field
The present disclosure relates to a wiring substrate and a method of manufacturing the same. More particularly, the present disclosure relates to a wiring substrate having a multi-layer structure capable of preventing deformation or reducing a deformation amount, and a method of manufacturing the same.
2. Related Art
Recently, a high integration, an increase in number of pins, and a decrease in size of a semiconductor device have been promoted with an increase in performance and a decrease in size of an electronic device using the semiconductor device such as a semiconductor chip. As a substrate on which the multi-pin and miniaturized semiconductor device is mounted, a multi-layer wiring substrate using a build-up method is used.
In this kind of multi-layer wiring substrate, a core layer is a reinforcement member such as glass fabric copper-clad lamination, and an insulating layer and a wiring layer are alternatively formed on both surfaces of the core layer (see e.g., JP-A-2000-261147). FIG. 11 is a cross sectional view showing a schematic configuration of a multi-layer wiring substrate 110. As shown in the same drawing, the multi-layer wiring substrate 110 has a configuration in which an insulating layer 113 and a wiring layer 114 are layered on both surfaces of a core substrate 111 having a through-hole 112 formed therein. The wiring layer 114 formed on the upper and lower portions of the core substrate 111 are electrically connected to each other via the through-hole 112.
Incidentally, since the rigidity reduces due to a decrease in thickness of the multi-layer wiring substrate used as the mounting substrate, the elastic characteristics of the electronic component and the multi-layer wiring substrate are combined with each other when the electronic component such as the semiconductor device is mounted onto the mounting substrate. As a result, deformation is generated in the wiring substrate on which the electronic component is mounted.
Particularly, when deformation such as warpage is generated in the wiring substrate, the deformation may cause an error of a carrying operation or breakage of the substrate during an automatic substrate carrying operation of an electronic component mounting process in the facility. Since a semiconductor package has been required to be further decreased in size nowadays, an error is generated frequently with a decrease in thickness of the wiring substrate. For this reason, it is difficult to improve electric performance and to reduce package cost due to a decrease in thickness of the substrate.